Typically, a buffered direct injection (BDI) Infra Red (IR) readout circuit has its widest applications in an IR readout integrated circuit (ROIC).
A basic BDI IR readout circuit is shown in FIG. 1. The circuit has an OPAMP 100 that biases the IR detector input at VREF 110 via the virtual ground of the opamp. The OPAMP 102 output controls the gate voltage of IR signal input gate 120, M_BDI. Typically, the BDI circuit also includes an integration capacitor 130 (C_SIG in FIG. 1) to integrate an IR signal 141 from the IR detector 140. At this circuit configuration, the IR input signal (current) is integrated on C_SIG 130 as a function of IR light intensity and integration time, while the IR detector pixel 140 is reverse biased at a known constant voltage.
At the end of integration, the IR signal, V_INT 145 is readout through the pixel OUTPUT circuit.
This BDI IR readout circuit can be improved in several ways. It can be advantageous to reduce the noise, lower the power, or minimize the pixel size of these devices. Some of the issues are listed in the following:
Low conversion gain—a BDI IR readout integrates the IR current to the integration capacitor. In order to maintain good signal linearity, a linear capacitor is desired. This can use, for example, a. MIM cap or a MOS cap based at inversion region. In standard CMOS process, the desired capacitor type has a low value limitation for device matching across the pixel array.
It can be difficult to implement correlated double sampling (“CDS”) in these pixels. In sensor applications, reset noise can add a significant portion of the noise source to the signal. Correlated Double Sampling (CDS) will remove the reset noise. However, since the sampling capacitor in figure (C_SIG) is being reset before the signal integration, in-pixel CDS operation can require additional capacitor(s) and support circuits in the pixel (such as AC coupling). The additional devices limit the reduction of the pixel size.
There can also be a routing limitation. If a MIM cap is used in pixel design; it not only occupies a fairly large percentage of the pixel area, but also blocks at areas of 2 or 3 metal layer routings horizontally and vertically. This will limit the functionality of the pixel and increase cross coupling between the critical signals.